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1/12 msm6502b/6512 ? semiconductor general description the msm6502b/6512 is a low-power, 4-bit microcontroller implemented in complementary metal-oxide semiconductor technology. the device is ideally suited to battery-powered systems such as watches and game machines because it can directly drive lcds with up to 108 picture elements. features ? rom : 2000 words 8 bits ? ram : 128 words 4 bits ? number of instructions : 68 ? clock oscillation : crystal 32.768 khz ? cycle time : 91.5 m s ? timer interrupt : dual (16,128 hz) ? i/o port input-output port : 2 ports 4 bits input port : 1 port 4 bits ? lcd drive : 108 (4 27) picture elements ? buzzer : 2000/1000/512 hz/soft ? interrupt : three sources (external; two timer sources) ? stack : nesting ram stack pointer = 7 bits ? power down : halt mode available ? operating power supply voltage : 2.4 v to 3.6 v ? package options: 56-pin plastic qfp (qfp56-p-910-0.65-k) : (product name : msm6502b- gs-k, msm6512- gs-k) 56-pin plastic qfp (qfp56-p-910-0.65-2k) : (product name : msm6502b- gs-2k, msm6512- gs-2k) indicates the code number. ? semiconductor msm6502b/6512 low-power and built-in lcd driver 4-bit microcontroller e2e0018-27-y4 this version: jan. 1998 previous version: mar. 1996
2/12 msm6502b/6512 ? semiconductor block diagram bz/ bz p1 p0 p2 program memory rom 2000 8bits r o m d a t a h l r i 8bits pcr ml h pc ml h idr l h 8bits 7bits 4bits 4bits sp l h l h instrucC tion decoder l h alu acc 4bits c 11bits 11bits dp l h data memory ram 128 4bits 8bits r/w lcd driver tbc f 8bits bus int. tbf control osc0 bz cont osc timing generator 4bits 4bits 4bits p1.0 to p1.3 p0.0 to p0.3 p2.0 to p2.3 2 osc1 reset 43 21 test i v a v dd 12bits com1 - 4 seg0 - 26 int gnd
3/12 msm6502b/6512 ? semiconductor pin configuration (top view) 56-pin plastic qfp 1 p0.0 2 p0.1 3 p0.2 4 p0.3 5 p1.0 6 p1.1 7 p1.2 8 p1.3 9 p2.0 10 p2.1 11 p2.2 42 41 40 39 38 37 36 35 34 33 32 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 56 seg26 55 seg25 54 seg24 53 seg23 52 seg22 51 seg21 50 seg20 49 v dd 48 seg19 47 seg18 46 seg17 15 reset 16 int 17 test1 18 test2 19 test3 20 test4 21 v dd 22 osc 0 23 osc 1 24 gnd 25 com1 12 p2.3 31 seg2 13 bz 30 seg1 14 bz 29 seg0 45 seg16 26 com2 44 seg15 27 com3 43 seg14 28 com4
4/12 msm6502b/6512 ? semiconductor pin descriptions symbol description gnd ground pin v dd power supply pins osc 0 crystal osc input, internal clock input osc 1 crystal osc input, internal clock output p0.0 to p0.3 p1.0 to p1.3 pseudo-bidirectional ports for 4-bit parallel i/o. to input data from these ports, it is necessary to write "1" beforehand. the port to be selected is specified by the l register. the register contents and the corresponding specified ports are listed below. note: p3, p4, and p5 are internal ports. p2.0 to p2.3 input port for 4-bit parallel input with no latching function. int input pin to request an interrupt from the external circuit. the input flag is set at the falling edge of the input signal. 6, 7, oeh, ofh 5, 0dh 4, 0ch 3, 0bh 2, 0ah 1, 9 0, 8 content of l register p5 p4 p3 p2 p1 p0 port specified no designation reset the reset mode starts after "0" is input to the reset pin for more than 2 machine cycles. the reset signal has priority over all of other signals and performs the following operations automatically: (1) resets all bits of the pc (program counter) to"0". (2) sets all bits of the parallel i/o ports (p0.0 to p1.3) to "1" (3) resets the internal register (h, l, a cc , c, p3, p4, p5). (4) resets the skip flag. (5) resets all bits of the time base counter (tbc). (6) resets the interrupt request flag (irqf). (7) resets the interrupt enable flag (eif). (8) resets the master interrupt enable flag (meif). (9) sets all bits of the stack pointer (sp) to "1" . (10) initializes the segment and common outputs. (11) sets all bits of the index register (idr) to "1". since the reset pin is pulled up to v dd by an internal resistor (800 k w ), it is possible to achieve power on reset by connecting it with an external capacitor. pin 24 21, 49 22 23 1 to 4 5 to 8 9 to 12 16 15
5/12 msm6502b/6512 ? semiconductor lcd drive pins seg 0 to 26 com 1 to 4 a special ac waveform designed to comply with liquid-crystal properties is required for liquid-crystal-drive purposes. the msm6502b/6512 is equipped with a 1/4 duty, 1/3 bias liquid-crystal-drive circuit with four common output ports and 27 segments, to enable displays of up to 108 picture elements. on/off selection of picture elements involves writing "0" or "1" to the corresponding bits in the ram 00h to 1ah display area, and subsequent automatic hardware controlled display. the frame frequency is 64 hz. bz/ bz bz and bz are used in the generation of alarms and other sounds. the selectable frequencies include three hardware frequencies (tbc output) of 512, 1024, and 2048 hz, and a software type based on p5.0 data. these frequencies are selected at p3. when one of the hardware frequencies is selected by p3, output of that frequency is continuous. but selection of the software type results in output of the p5.0 contents to generate a melody by program. symbol description 29 to 48 50 to 56 25 to 28 13,14 pin pin descriptions (continued)
6/12 msm6502b/6512 ? semiconductor absolute maximum ratings recommended operating conditions parameter symbol condition rating unit power supply voltage v dd ta=25c C0.3 to +7 v input voltage v i C0.3 to v dd v output voltage v o C0.3 to v dd v power dissipation p d ta=25c per package 200 mw storage temperature t stg C55 to +150 c parameter symbol condition range unit power supply voltage v dd f osc 32.768 khz 2.4 to 3.6 v operating temperature t op C20 to +70 c
7/12 msm6502b/6512 ? semiconductor electrical characteristics dc characteristics (v dd =3 v, ta=C20 to +70c) parameter symbol condition min. typ. max. unit v ih 2.6 v v il 0.4 v v oh 2.0 v v ol 1.0 v v 3 2.8 3.0 v v 2 v 1 v 0 i ih /i il 2/C2 m a 1000/C1 i ih /i il 1/C10 "h" input voltage "l" input voltage "h" output voltage (*1) "l" output voltage (*2) lcd drive output voltage (*3) osc 0 input current input current (*4) input current (*6) i o =1.0 ma msm6502b v i =v dd /v i =0 v v i =v dd /v i =0 v v i =v dd /v i =0 v v o =0 v v i =v dd /v i =0 v 1/C10 i ih /i il i ih /i il input current (*5) i oh C50 p0, p1 "h" output current f osc =32.768 khz at no load i dd 45 70 current consumption 30 55 i ddhlt 30 40 12 25 static i dds 15 25 515 t osc 10 sec oscillation start time i o =C1.0 ma f osc =32.768 khz at hlt execution i o =C5 m a msm6512 msm6502b msm6512 msm6502b msm6512 msm6502b msm6512 i o =C2 m a i o =2 m a i o =0.5 m a i o =2 m a i o =0.5 m a i o =5 m a i o =2 m a 1.8 2.2 v 0.8 1.2 v 0.0 0.2 v m a m a m a m a m a m a m a msm6502b msm6512 msm6502b msm6512 msm6502b msm6512 *1 applied to bz, bz *2 applied to bz, bz, p0, p1 *3 applied to com1-4, seg0-26 v 3 v 2 v 1 v 0 *4 applied to reset , int *5 applied to p2 (when input is disabled) *6 applied to p2 (when input is enabled)
8/12 msm6502b/6512 ? semiconductor switching characteristics parameter symbol condition min. typ. max. unit clock (osc 0 ) pulse width t f w 15 m s cycle time t cy (*1) m s p0 p1 p2 t dv (*2) m s p0 p1 p2 t div (*3) m s p0 p1 t dds c l =50 pf (*4) m s data delay time data invalid time data valid time (v dd =3 v, ta=C20 to +70c) *1 t cy =3 1/f osc *2 t dv =1/2 1/f osc *3 t div =1 1/f osc + 10 m s *4 t dds =5/2 1/f osc + 15 m s 1mc t cy t f w t f w invalid valid invalid t div t dv old data new data t dds p0 p1 input mode p2 osc 0 p0 p1 output mode
9/12 msm6502b/6512 ? semiconductor operating characteristics (msm6502b) high-level output current (i oh ) - output voltage (v oh ) low-level output current (i ol ) - output voltage (v ol ) 012345678910 0 C1 C2 C3 C4 C5 i oh (ma) (v dd =3 v, ta=25c) v oh (v) 012345678910 0 1 2 3 4 5 6 7 8 9 10 i ol (ma) (v dd =3 v, ta=25c) v ol (v) 012345678910 C25 C20 C15 C10 C5 0 2 10 15 20 25 i 1, i 2 ( m a) (v dd =3 v, ta=25c) v 1, v 2 (v) bz, bz pins (com, seg pins) (p0, p1 pins) com, seg pins (p0, p1 pins) (bz, bz pins) v 1 v 2 (com, seg pins) 012345678910 v dd (v) (ta=25c, no load) 100n i dd (a) 500n 1 m 5 m 10 m 50 m 100 m 500 m 1m 5m 10m f osc =32.768 khz 0hz middle-level output current (i 1 , i 2 ) - output voltage (v 1 , v 2 ) current consumption (i dd ) - power supply voltage (v dd )
10/12 msm6502b/6512 ? semiconductor operating characteristics (msm6512) high-level output current (i oh ) - output voltage (v oh ) low-level output current (i ol ) - output voltage (v ol ) 012345678910 0 C1 C2 C3 C4 C5 i oh (ma) (v dd =3 v, ta=25c) v oh (v) 012345678910 0 1 2 3 4 5 6 7 8 9 10 i ol (ma) (v dd =3 v, ta=25c) v ol (v) 012345678910 C25 C20 C15 C10 C5 0 2 10 15 20 25 i 1, i 2 ( m a) (v dd =3 v, ta=25c) v 1, v 2 (v) (bz, bz pins) (com, seg pins) (p0, p1 pins) (com, seg pins) (p0, p1 pins) (bz, bz pins) v 1 v 2 (com, seg pins) 012345678910 v dd (v) (ta=25c, no load) 100n i dd (a) 500n 1 m 5 m 10 m 50 m 100 m 500 m 1m 5m 10m f osc =32.768 khz 0hz middle-level output current (i 1 , i 2 ) - output voltage (v 1 , v 2 ) current consumption (i dd ) - power supply voltage (v dd )
11/12 msm6502b/6512 ? semiconductor (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp56-p-910-0.65-k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 0.36 typ. mirror finish
12/12 msm6502b/6512 ? semiconductor (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp56-p-910-0.65-2k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 0.43 typ. mirror finish

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